ISSN 2394-5125

    Delay Efficient 128-Bit Ladner Fischer Adder (2023)

    Naresh babu, Payyavula Srija, Kuthadi Sathvika, Pasula Lakshmi Sowmya
    JCR. 2023: 255-262


    In digital circuits, an adder is a crucial component used for adding numbers together. The Lender-Fisher Adder is a popular type of adder that employs the Carry Look ahead principle, which helps enhance the speed of addition. By reducing the reliance on carry propagation delay, which can slow down the process in larger adders, the Lender-Fisher Adder improves efficiency. The Lender-Fisher Adder comprises several stages, each responsible for generating a carry bit for a specific bit position. These stages work in parallel, enabling faster computation. The generated carry bits are then fed into subsequent stages to obtain the final sum output. In essence, the concept of a Lender-Fisher Adder represents a high-speed, parallel adder circuit specifically engineered to perform arithmetic operations on binary numbers that are 128 bits in length


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    Volume & Issue

    Volume 10 Issue-4