FPGABASED AVANCEDERROR CORRECTION FOR FAILURERECOVERY (2022)
RAJUKATRU, N SRIKANTH, Dr. J.Prashanth Kumar, Dr. Jagan mohan Rao JCR. 2022: 278-288
Parallel failure recoveryandmeantimebetweenfailuresisveryimportantforVLSIdigitalelectronic circuits. Different fault tolerance mechanisms are available fordesigningachip.But,theyhavesomelimitations, like: tolerance range, scatter/gather loading and data backup. The FFT(FastFourierTransforms) remain important components in several “communication” systems.The CMOStechnologyscalingisdecreasesdaybyday.So,parallelprocessingisnecessary,becauseofthese faults are occur. Parseval checks available for parallelfaultprotectionbutdidnotsolvethesometechnicalproblems. In order to remove above conflicts introduced thetwo models,i.e.1stone is Automated Traditional Check- withPlancherelFunctionisproposedforparallelfaulttolerance.Inadditiontothis(2ndmethod)artificialintelligentalgorithmicbasedfaulttolera nce(AIABFT)method is used for error correction codes. The combinationoftwoschemesATCPF,AIABFTgivesthedesigncomplexity reduction and protection forcombination andsignal processingsystem.
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